NSUKit 1.4.0
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pcie_interface.cpp
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1//
2// Created by 56585 on 2023/8/15.
3//
4
6
7using namespace nsukit;
8
10
11
13 OpLock.lock();
14 if (openedBoard.find(board) == openedBoard.end()) {
15 openedBoard[board] = 0;
16 }
17 if (openedBoard[board] == 0) {
18 if (!fpga_open(board)) {
19 OpLock.unlock();
20 return nsukitStatus_t::NSUKIT_STATUS_ACCEPT_FAIL;
21 }
22 }
23 openedBoard[board] += 1;
24 OpLock.unlock();
25 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
26}
27
28
30 OpLock.lock();
31 if (openedBoard.find(board) == openedBoard.end()) {
32 OpLock.unlock();
33 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
34 }
35 auto num = openedBoard[board];
36 num -= 1;
37 if (num == 0) fpga_close(board);
38 openedBoard[board] = num;
39 OpLock.unlock();
40 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
41}
42
43
45
46
47unsigned int PCIECmdUItf::irqNum = 15;
48
49
51 pciBoard = param->cmd_board;
52 sentBase = param->cmd_sent_base;
53 recvBase = param->cmd_recv_base;
54 irqBase = param->cmd_irq_base;
56
58}
59
60
63}
64
65
67 pciTimeout = (int )(s*1000.);
68 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
69}
70
71
73 return send_bytes(bytes.data(), bytes.size());
74}
75
76
78 OpLock.lock();
80 auto st = std::chrono::high_resolution_clock::now();
81
82 auto res = increment_write(sentBase, bytes, length);
84 std::this_thread::sleep_for(std::chrono::milliseconds(5));
86
87 auto _use_time = (double )(std::chrono::high_resolution_clock::now()-st).count() * 1e-9;
88 if (_use_time < onceTimeout) {
89 OpLock.unlock();
90 return nsukitStatus_t::NSUKIT_STATUS_TIMEOUT;
91 }
92 onceTimeout -= _use_time;
93 OpLock.unlock();
94 return res;
95}
96
97
99 if (size <= 0) return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
100 if (buf == nullptr) return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
101
102 auto res = nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
103 res |= per_recv();
104 res |= increment_read(recvBase, size, buf);
105 return res;
106}
107
108
110 fpga_wr_lite(pciBoard, addr, value);
111 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
112}
113
114
116 if (buf== nullptr) {
117 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
118 }
119 auto res = fpga_rd_lite(pciBoard, addr);
120 memcpy(buf, &res, sizeof(nsuRegValue_t ));
121 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
122}
123
124
126 fpga_wr_lite(pciBoard, irqBase, 0x80000000);
127 std::this_thread::sleep_for(std::chrono::milliseconds(5));
129 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
130}
131
133 unsigned int cnt = 0;
134 while (fpga_rd_lite(pciBoard, irqBase) != 0x8000) {
135 std::this_thread::sleep_for(std::chrono::milliseconds(5));
136 cnt++;
137 if (cnt >= 30*1000*10 -1){
138 return nsukitStatus_t::NSUKIT_STATUS_TIMEOUT;
139 }
140 }
141// auto res = fpga_wait_irq(pciBoard, irqNum, static_cast<int>(onceTimeout*1000));
142// if (res != 0) return nsukitStatus_t::NSUKIT_STATUS_TIMEOUT;
143 reset_irq();
144 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
145}
146
147
149 pciBoard = param->stream_board;
150
152}
153
156}
157
159 return U_Interface::set_timeout(s);
160}
161
163 auto fd = (nsuMemory_p)fpga_alloc_dma(pciBoard, length, buf);
166 return fd;
167}
168
170 fpga_free_dma(fd);
171 downloadProcess.erase(fd);
172 uploadProcess.erase(fd);
173 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
174}
175
177 return fpga_get_dma_buffer(fd);
178}
179
182 if ((chnl >= maxChnl) || (length % byteWidth != 0) || (offset % byteWidth != 0)) {
183 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
184 }
185 if (downloadProcess.find(fd) == downloadProcess.end()) {
186 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
187 }
188 auto res = fpga_send(pciBoard, chnl, fd, length/byteWidth, offset/byteWidth, 1, 0, 0, DMA_NOWAIT);
189 if (res == DMA_START_ERROR) {
190 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
191 }
192 downloadProcess[fd].total = length;
193 downloadProcess[fd].current = res*byteWidth;
194 uploadProcess[fd].total = 0;
195 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
196}
197
200 if ((chnl >= maxChnl) || (length % byteWidth != 0) || (offset % byteWidth != 0)) {
201 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
202 }
203 if (uploadProcess.find(fd) == uploadProcess.end()) {
204 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
205 }
206 auto res = fpga_recv(pciBoard, chnl, fd, length/byteWidth, offset/byteWidth, 1, 0, 0, DMA_NOWAIT);
207 if (res == DMA_START_ERROR) {
208 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
209 }
210 uploadProcess[fd].total = length;
211 uploadProcess[fd].current = res*byteWidth;
212 downloadProcess[fd].total = 0;
213 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
214}
215
217 StreamProcess *process = nullptr;
218 if (uploadProcess[fd].total != 0) process = &uploadProcess[fd];
219 if (downloadProcess[fd].total != 0) process = &downloadProcess[fd];
220 if (process == nullptr) {
221 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
222 }
223 auto res = fpga_wait_dma(fd, (uint32_t)(timeout*1000.));
224 process->current = res*byteWidth;
225 if (process->current != process->total) {
226 return nsukitStatus_t::NSUKIT_STATUS_STREAM_RUNNING;
227 }
228 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
229}
230
232 StreamProcess *process = nullptr;
233 if (uploadProcess[fd].total != 0) process = &uploadProcess[fd];
234 if (downloadProcess[fd].total != 0) process = &downloadProcess[fd];
235 if (process == nullptr) {
236 return nsukitStatus_t::NSUKIT_STATUS_INVALID_VALUE;
237 }
238 fpga_break_dma(fd);
239 process->total = 0;
240 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
241}
242
245 bool(*stop_event) (), float timeout, int flag) {
246 open_recv(chnl, fd, length, offset);
247 if (stop_event == nullptr) {
248 stop_event = []() { return false; };
249 }
250 while (true) {
251 if (stop_event()) {
252 break_stream(fd);
253 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
254 }
255
256 auto res = wait_stream(fd, timeout);
257
258 if (res == nsukitStatus_t::NSUKIT_STATUS_SUCCESS) {
259 return res;
260 }
261 }
262}
263
266 bool(*stop_event) (), float timeout, int flag) {
267 open_send(chnl, fd, length, offset);
268 if (stop_event == nullptr) {
269 stop_event = []() { return false; };
270 }
271 while (true) {
272 if (stop_event()) {
273 break_stream(fd);
274 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
275 }
276
277 auto res = wait_stream(fd, timeout);
278
279 if (res == nsukitStatus_t::NSUKIT_STATUS_SUCCESS) {
280 return res;
281 }
282 }
283}
284
285
287
289 ring_chnl_size = param->ring_chnl_size;
290 auto res = PCIEStreamUItf::accept(param);
292 return res;
293}
294
296 for (auto &t: ringCache) {
297 if (t.second != nullptr) fpga_ring_close(t.second);
298 }
299 for (auto &t: memory_dict) {
300 if (t.second != nullptr) free_buffer(t.second);
301 }
302 memory_index = 0;
303 return PCIEStreamUItf::close();
304}
305
307 auto mem = new Memory{};
308
309 mem->idx = memory_index;
310 mem->mem_size = length;
311 mem->finish_event.setEvent();
312
314 memory_index++;
315 DEBUG_PRINT_CLASS(std::to_string(length));
316 return mem;
317}
318
320 auto mem = (Memory *)fd;
321 if (!mem->finish_event.isSet()) {
322 return nsukitStatus_t::NSUKIT_STATUS_STREAM_RUNNING;
323 }
324 mem->finish_event.resetEvent();
325 memory_dict.erase(mem->idx);
326 delete mem;
327 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
328}
329
331 auto mem = (Memory *)fd;
332 {
333 std::unique_lock<std::mutex> lock(mem->mtx);
334 return mem->memory;
335 }
336}
337
340 auto res = nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
341 auto mem = (Memory *)fd;
342 if (offset != 0) {
343 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
344 }
345 DEBUG_PRINT_CLASS("chnl="+std::to_string(chnl)+", length="+std::to_string(length));
346 {
347 std::unique_lock<std::mutex> lock(mem->mtx);
348 if (ringCache[chnl] == nullptr) {
349 auto ring = fpga_ring_create(pciBoard, chnl, 1, ring_chnl_size[chnl] / byteWidth);
350 fpga_ring_resume(ring);
351 ringCache[chnl] = ring;
352 }
353 mem->ring = ringCache[chnl];
354 mem->chnl = chnl;
355 }
356
357 return res;
358}
359
361 auto mem = (Memory *)fd;
362 {
363 std::unique_lock<std::mutex> lock(mem->mtx);
364 DEBUG_PRINT_CLASS(std::to_string(mem->mem_size/byteWidth));
365 nsuMemory_p buffer = fpga_ring_next_buffer(mem->ring, mem->mem_size/byteWidth, int (timeout*1000.));
366 DEBUG_PRINT_CLASS("00000");
367 if (buffer == nullptr) {
368// char err[10240];
369// fpga_ring_get_info(mem->ring, err);
370// DEBUG_PRINT_CLASS(err);
371 return nsukitStatus_t::NSUKIT_STATUS_STREAM_RUNNING;
372 }
373 mem->memory = buffer;
374 }
375 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
376}
377
379 auto mem = (Memory *)fd;
380 DEBUG_PRINT_CLASS("00000");
381 {
382 std::unique_lock<std::mutex> lock(mem->mtx);
383 if (mem->ring == nullptr) {
384 return nsukitStatus_t::NSUKIT_STATUS_STREAM_FAIL;
385 }
386 ringCache[mem->chnl] = nullptr;
387 fpga_ring_close(mem->ring);
388 }
389 return nsukitStatus_t::NSUKIT_STATUS_SUCCESS;
390}
nsukitStatus_t increment_read(nsuRegAddr_t addr, nsuSize_t length, nsuVoidBuf_p value, nsuSize_t reg_len=NSU_REG_BWIDTH)
Definition: base_itf.h:123
nsukitStatus_t increment_write(nsuRegAddr_t addr, nsuVoidBuf_p value, nsuSize_t length, nsuSize_t reg_len=NSU_REG_BWIDTH)
Definition: base_itf.h:115
nsukitStatus_t close() override
nsukitStatus_t write(nsuRegAddr_t addr, nsuRegValue_t value) override
nsukitStatus_t accept(nsuInitParam_t *param) override
static unsigned int irqNum
nsukitStatus_t read(nsuRegAddr_t addr, nsuRegValue_t *buf) override
nsuRegAddr_t sentBase
nsukitStatus_t set_timeout(float s) override
nsuRegAddr_t sentDownBase
nsukitStatus_t reset_irq()
nsukitStatus_t recv_bytes(nsuSize_t size, nsuCharBuf_p buf) override
nsuRegAddr_t irqBase
nsuBoardNum_t pciBoard
nsukitStatus_t per_recv()
nsukitStatus_t send_bytes(nsuBytes_t &bytes) override
nsuRegAddr_t recvBase
std::map< uint32_t, HANDLE > ringCache
nsukitStatus_t close() override
nsuVoidBuf_p get_buffer(nsuMemory_p fd, nsuStreamLen_t length) override
nsuMemory_p alloc_buffer(nsuStreamLen_t length, nsuVoidBuf_p buf=nullptr) override
nsukitStatus_t free_buffer(nsuMemory_p fd) override
nsukitStatus_t break_stream(nsuMemory_p fd) override
std::map< unsigned int, Memory * > memory_dict
nsukitStatus_t open_recv(nsuChnlNum_t chnl, nsuMemory_p fd, nsuStreamLen_t length, nsuStreamLen_t offset=0) override
nsukitStatus_t accept(nsuInitParam_t *param) override
nsukitStatus_t wait_stream(nsuMemory_p fd, float timeout=1.) override
unsigned int memory_index
nsukitStatus_t open_recv(nsuChnlNum_t chnl, nsuMemory_p fd, nsuStreamLen_t length, nsuStreamLen_t offset=0) override
nsukitStatus_t stream_recv(nsuChnlNum_t chnl, nsuMemory_p fd, nsuStreamLen_t length, nsuStreamLen_t offset=0, bool(*stop_event)()=nullptr, float timeout=5., int flag=1) override
nsuVoidBuf_p get_buffer(nsuMemory_p fd, nsuStreamLen_t length) override
nsukitStatus_t stream_send(nsuChnlNum_t chnl, nsuMemory_p fd, nsuStreamLen_t length, nsuStreamLen_t offset=0, bool(*stop_event)()=nullptr, float timeout=5., int flag=1) override
nsukitStatus_t accept(nsuInitParam_t *param) override
nsuMemory_p alloc_buffer(nsuStreamLen_t length, nsuVoidBuf_p buf=nullptr) override
nsukitStatus_t free_buffer(nsuMemory_p fd) override
std::map< nsuMemory_p, StreamProcess > downloadProcess
nsukitStatus_t break_stream(nsuMemory_p fd) override
nsukitStatus_t set_timeout(float s) override
std::map< nsuMemory_p, StreamProcess > uploadProcess
nsukitStatus_t open_send(nsuChnlNum_t chnl, nsuMemory_p fd, nsuStreamLen_t length, nsuStreamLen_t offset=0) override
nsukitStatus_t close() override
nsukitStatus_t wait_stream(nsuMemory_p fd, float timeout=1.) override
virtual nsukitStatus_t set_timeout(float s)
Definition: base_itf.h:37
nsukitStatus_t close_xdma_board(int board)
nsukitStatus_t open_xdma_board(int board)
std::map< int, int > openedBoard
#define DEBUG_PRINT_CLASS(message)
Definition: config.h:42
static XDMAOperation_t xdmaOp
nsuBoardNum_t cmd_board
Definition: type.h:115
std::map< nsuChnlNum_t, nsuSize_t > ring_chnl_size
Definition: type.h:122
nsuRegAddr_t cmd_irq_base
Definition: type.h:118
nsuRegAddr_t cmd_sent_down_base
Definition: type.h:119
nsuRegAddr_t cmd_sent_base
Definition: type.h:116
nsuBoardNum_t stream_board
Definition: type.h:121
nsuRegAddr_t cmd_recv_base
Definition: type.h:117
DLLEXTERN typedef nsuSize_t nsuStreamLen_t
Definition: type.h:88
nsukitStatus_t
Definition: type.h:53
DLLEXTERN typedef size_t nsuSize_t
Definition: type.h:87
DLLEXTERN typedef void * nsuVoidBuf_p
Definition: type.h:83
DLLEXTERN typedef void * nsuMemory_p
Definition: type.h:86
DLLEXTERN typedef char * nsuCharBuf_p
Definition: type.h:82
DLLEXTERN typedef std::vector< char > nsuBytes_t
Definition: type.h:81
DLLEXTERN typedef uint32_t nsuRegValue_t
Definition: type.h:90
DLLEXTERN typedef uint8_t nsuChnlNum_t
Definition: type.h:85
DLLEXTERN typedef uint32_t nsuRegAddr_t
Definition: type.h:89
DLLEXPORT HANDLE _API_CALL fpga_ring_create(unsigned int boardn, unsigned int chnl, unsigned int c2h, unsigned long long len32)
DLLEXPORT void _API_CALL fpga_free_dma(HANDLE dma)
DLLEXPORT void _API_CALL fpga_close(unsigned int boardn)
DLLEXPORT unsigned long long _API_CALL fpga_send(unsigned int boardn, unsigned int chnl, HANDLE dma, unsigned long long len32, unsigned long long offset=0, unsigned int last=1, unsigned int mm_addr=0, unsigned int mm_addr_inc=0, unsigned int timeout=DMA_WAIT_FOR_EVER)
DLLEXPORT void _API_CALL fpga_ring_close(HANDLE ring)
#define DMA_START_ERROR
Definition: xdma_api.h:176
DLLEXPORT unsigned int _API_CALL fpga_rd_lite(unsigned int boardn, unsigned int addr8)
DLLEXPORT HANDLE _API_CALL fpga_alloc_dma(unsigned int boardn, unsigned long long len32, void *buffer=NULL, HANDLE share_dma=NULL)
DLLEXPORT void _API_CALL fpga_wr_lite(unsigned int boardn, unsigned int addr8, unsigned int data)
DLLEXPORT unsigned long long _API_CALL fpga_recv(unsigned int boardn, unsigned int chnl, HANDLE dma, unsigned long long len32, unsigned long long offset=0, unsigned int last=1, unsigned int mm_addr=0, unsigned int mm_addr_inc=0, unsigned int timeout=DMA_WAIT_FOR_EVER)
DLLEXPORT unsigned long long _API_CALL fpga_break_dma(HANDLE dma)
DLLEXPORT char *_API_CALL fpga_info_string(unsigned int boardn)
DLLEXPORT void _API_CALL fpga_ring_resume(HANDLE ring)
DLLEXPORT void *_API_CALL fpga_ring_next_buffer(HANDLE ring, unsigned long long len32, int timeout)
DLLEXPORT void * fpga_get_dma_buffer(HANDLE dma)
DLLEXPORT bool _API_CALL fpga_open(unsigned int boardn, unsigned int poll_interval_ms=0, unsigned int test_print=0)
#define DMA_NOWAIT
Definition: xdma_api.h:177
DLLEXPORT unsigned long long _API_CALL fpga_wait_dma(HANDLE dma, unsigned int timeout=DMA_WAIT_FOR_EVER)